///////////////////////////////////////////////////////////////////////////////
// Company: University of Cincinnati
// Author: Jordan Ross, Ben Gentry, Bryan Butsch
//
// Created Date: 09/22/2013
// Design Name:
// Module Name: TenToOneMux
// Project Name: Proc
// Target Devices: Cyclone II EP2C20F484C7
// Tool Versions: Quartus 13.0
// Description: This module is a 10 input multiplexer that outputs a single line.
//   The default line size for the mux is 9 bit. It is controlled by 3 select lines.
//   2 of the lines are bit sized that select special inputs lines. The remaining line
//   is a 8 bit line that selects from the other 8 inputs with are general purpose.
// 
// Dependencies: None
// 
// Revision:
// 0.01 - File Created
// 0.02 - Code compiled
// 0.03 - Fixed MUX to work correctly with input decoded 8-bit line.
// 0.04 - Tested with processor test bench.
//
// Additional Comments:
//
///////////////////////////////////////////////////////////////////////////////
module TenToOneMux(Gout, DINout, Regout, R0, R1, R2, R3, R4, R5, R6, R7, DIN, G, out);
	parameter n = 8;
	input [7:0] Regout; 
	input Gout, DINout; 
	input [n:0] R0, R1, R2, R3, R4, R5, R6, R7, DIN, G;
	output reg [n:0] out;
	
	always @(*) begin
		if (Gout == 1)
			out = G;
		else if (DINout == 1)
			out = DIN;
		else begin
			case (Regout)
				'b00000001 : out = R7;
				'b00000010 : out = R6;
				'b00000100 : out = R5;
				'b00001000 : out = R4;
				'b00010000 : out = R3;
				'b00100000 : out = R2;
				'b01000000 : out = R1;
				'b10000000 : out = R0;
				default : out = 'b00000000;
			endcase
		end
	end
endmodule
